1. Field
Certain aspects of the present disclosure generally relate to a wireless communication and, more particularly, to a method and an apparatus for designing structured multi-rate low-density parity-check (LDPC) codes.
2. Background
Error correcting codes are widely utilized in wireless communications. Error correcting codes compensate for an intrinsic unreliability of transmitted information by introducing redundancy into a data stream. Considerable interest has recently grown in a class of codes known as low-density parity-check (LDPC) codes. LDPC codes have been demonstrated to provide error-rate performance close to channel capacity, which represents a lower bound for wireless transmissions.
Encoding of LDPC codes refers to a procedure that produces a codeword from a set of information bits by incorporating a certain number of redundant bits. Rate of an LDPC code is defined as a ratio of a number of information bits and a total number of encoded bits (i.e., information bits and redundant bits).
Emerging wireless communication standards continuously evolve. Because of that, it is important to design LDPC codes that are flexible to support multi-rate encoding at a transmitter side. Furthermore, in order to allow high data rate communications, important consideration is also to achieve high-speed encoding with affordable computational complexity.
Therefore, there is a need in the art for a method to generate flexible multi-rate LDPC codes with structures that support high speed encoding process.